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 Philips Semiconductors
Objective Specification
PowerMOS transistor
PHP1N50E
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications.
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance MAX. 500 2 50 5 UNIT V A W
PINNING - TO220AB
PIN 1 2 3 tab gate drain source drain DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g
1 23
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDS VDGR VGS ID IDM IDR IDRM Ptot Tstg Tj Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (pulse peak value) Source-drain diode current (DC) Source-drain diode current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 k Tmb = 25 C Tmb = 100 C Tmb = 25 C Tmb = 25 C Tmb = 25 C Tmb = 25 C MIN. -55 MAX. 500 500 30 2.0 1.3 8.0 2.0 8.0 50 150 150 UNIT V V V A A A A A W C C
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER WDSS CONDITIONS MIN. MAX. UNIT Drain-source non-repetitive ID = 2 A ; VDD 50 V ; VGS = 10 V ; unclamped inductive turn-off RGS = 50 energy Tj = 25C prior to surge Tj = 100C prior to surge Drain-source repetitive ID = 2 A ; VDD 50 V ; VGS = 10 V ; unclamped inductive turn-off RGS = 50 ; Tj 150 C energy
WDSR1
-
120 20 3.6
mJ mJ mJ
1. Pulse width and frequency limited by Tj(max)
October 1996
1
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHP1N50E
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. TYP. 60 MAX. 2.5 UNIT K/W K/W
STATIC CHARACTERISTICS
Tmb = 25 C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS RDS(ON) VSD PARAMETER Drain-source breakdown voltage Gate threshold voltage Drain-source leakage current Gate-source leakage current Drain-source on-state resistance Source-drain diode forward voltage CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA VDS = 500 V; VGS = 0 V; Tj = 25 C VDS = 400 V; VGS = 0 V; Tj = 125 C VGS = 30 V; VDS = 0 V VGS = 10 V; ID = 1 A IF = 2 A ;VGS = 0 V MIN. 500 2.0 TYP. 3.0 10 0.1 10 4.5 0.8 MAX. 4.0 100 1.0 100 5.0 1.2 UNIT V V A mA nA V
DYNAMIC CHARACTERISTICS
Tmb = 25 C unless otherwise specified SYMBOL gfs Ciss Coss Crss Qg(tot) Qgs Qgd td on tr td off tf trr Qrr Ld Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Total gate charge Gate to source charge Gate to drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Source-drain diode reverse recovery time Source-drain diode reverse recovery charge Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 15 V; ID = 1 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 0.5 TYP. 0.9 230 35 14 10 1 5 10 30 30 20 350 2.5 3.5 4.5 7.5 MAX. 300 50 30 15 45 40 30 UNIT S pF pF pF nC nC nC ns ns ns ns ns C nH nH nH
VGS = 10 V; ID = 2 A; VDS = 400 V VDD = 30 V; ID = 2 A; VGS = 10 V; RGS = 50 ; RGEN = 50 IF = 2 A; -dIF/dt = 100 A/s; VGS = 0 V; VR = 100 V Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad
October 1996
2
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHP1N50E
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
4,5 max 10,3 max
1,3
3,7 2,8
5,9 min
15,8 max
3,0 max not tinned
3,0
13,5 min
1,3 max 1 2 3 (2x)
2,54 2,54
0,9 max (3x)
0,6 2,4
Fig.1. TO220AB; pin 2 connected to mounting base.
Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for TO220 envelopes. 3. Epoxy meets UL94 V0 at 1/8".
October 1996
3
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHP1N50E
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
October 1996
4
Rev 1.000


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